The present application relates to a semiconductor structure and a method of forming the same. More particularly, the present application relates to a semiconductor structure containing a strain relaxed buffer layer that contains regions that are essentially defect free, and a method of forming the same.
Strain relaxed buffer (SRB) layers are needed for strained channel complementary metal oxide semiconductor (CMOS) devices. As an example, a silicon germanium alloy (i.e., SiGe) SRB layer is used for growing tensily-strained silicon (Si) channels for n-channel field effect transistors (i.e., nFETs), and compressively-stained germanium or high-germanium percentage SiGe channels for p-channel field effect transistors (i.e., pFETs). Usually, a very thick SRB layer is needed to ensure low defect density in the channel region of such FETs. Typical, SRB layer thickness is in the micron (μm) range.
Another approach for obtaining low defect density involves implant anneal buffer/strain relaxed buffer layers (IAB/SRB layers). Such structures are currently a preferred approach for 7 nm node technology, enabling the attainment of dual channel material FinFETs on the same substrate. One of the challenges with the IAB/SRB layer process is that the defect density at the surface buffer layer is in the 1×105 range even for the best known structures. This level of defect density is far too high to achieve high performance CMOS fabrication.